In recent years, 3-level converters have been gaining attention, for example, because they can relatively readily achieve a high voltage and a large capacity with few output harmonics. For example, for a self-exciting reactive power compensation device such as a STATCOM (Static Synchronous Compensator), an SVG (Static Var Generator) or a self-exiting SVC (Static Var Compensator), there has been a proposed configuration in which a neutral-point clamp-type 3-level converter is used in a power conversion device made using a semiconductor switching element having a high breakdown voltage and a large rated current.
According to this 3-level converter, it has conventionally been known that, according to a switching pattern, there occurs a time period during which the neutral point in a direct-current (DC) power supply circuit is connected to an alternating-current (AC) line through a switching element and a diode, and the potential at the neutral point varies due to the current flowing through the neutral point during this time period (for example, see Japanese Patent Laying-Open No. 07-79574 (PTD 1); Japanese Patent Laying-Open No. 07-135782 (PTD 2); and “Balancing Control of DC Input Capacitor Voltage on NPC Inverter” by Shimamura et al., (The Institute of Electrical Engineers of Japan, The Papers of Technical Meeting on Semiconductor Power Converter SPC-91-37) (NPD 1)). Such variations in neutral point potential may cause a voltage to be excessively applied to a switching element.
As one method for preventing such a disadvantage, NPD 1 discloses a configuration in which a voltage command for the power conversion device is corrected according to the voltage difference between DC voltages on two capacitors such that the DC voltages on two capacitors connected in series and forming a DC power supply circuit are equal to each other. According to this NPD 1, the compensation amount produced based on the voltage difference between the DC voltages on two capacitors is subjected to polarity conversion as required and added to an output voltage command for each phase of the 3-level inverter, thereby generating a final output voltage command. In addition, polarity conversion of the compensation amount is performed based on the active power and the reactive power that are output from the 3-level inverter, and on the inverter output frequency. In the following, control for suppressing variations in potential at the neutral point will be referred to as “DC voltage balance control”.